Anonymous ID: 94837c May 1, 2020, 4:06 a.m. No.8985711   🗄️.is đź”—kun   >>5784 >>5840 >>6004 >>6030

>>8985422

The patent appears to be a way of modulating a digital signal to be more power-efficient.

https://www.electronics-notes.com/articles/radio/modulation/quadrature-amplitude-modulation-what-is-qam-basics.php

Quadrature Amplitude Modulation, QAM

Say, if you are wirelessly tracking individuals, and the transmitter has no user data to send home to a receiver. This system would send all ones or all zeros in part of the bit stream to reduce power.

There would be less crosstalk/interference & more efficient use of power. Maybe less overhead?

Not sure if it is notable, but this is the patent holder

http://www.upzide.com/

MANAGEMENT

Dr. Mikael Isaksson

CEO and founder

 

Expert signal processing, system engineering, management and market & sales. Worked at Telia Research 1989-2001, founded UpZide in 2001 and been CEO ever since. Mikael has been in leadership roles since mid 90’s, but have always performed engineering in parallel. Active in VDSL standardization (ITU SG15/Q4, ANSI T1E1.4, ETSI TM6) between 1995 and 2003.

 

Mikael’s innovation track record is fairly impressive, more than 30 patents in the field of radio and VDSL. His key innovations is today a central part of the VDSL standard. In 2004, he was awarded Honorary Doctor by the Universitly of Lund.

 

Göran Ökvist

CTO and founder

 

Senior system engineer with extensive experience in R&D, from system engineering to efficient and product oriented product management.

 

Background in the Swedish armed forces, project manager of national and international projects, site manager Telia Research, CTO Upzide Labs, worked/lead engineering at STMicroelectronics, Huawei, IMC, Samsung etc.

…

Another link to Huawei

https://archive.vn/gf99G

J.G. DESIGN SOLUTIONS

Clients

Huawei

At Huawei we helped design some of the subsystems for base stations using configurable processors. This involved designing the cores as well as implementing a full system model to analyze the data bandwidth and latency.

 

Upzide Labs

We helped Upzide Labs develop a multi processor, multiport VDSL2 system based around 50 highly configured Xtensa cores. Essentially, rather than RTL, there were six sequential heterogeneous processors forming the VDSL data path. This was duplicated eight times to handle eight ports simultaneously and there were also two extra processors, one system controller and one acting as the DMA engine.

…

Upzide Labs has an article in Swedish in this magazine p 12.

https://manualzz.com/doc/14312319/12-2005–tema-rf-och-tr%C3%A5dl%C3%B6st–5-mbyte–pdf-

Interesting cover.